The manufacture of semiconductor devices generally requires the deposition of a layer which is later etched off to reveal an underlying layer. For example, a conductor will be completely covered with an insulator at one stage in the processing, and at a later stage in the processing, individual segments of the insulator layer will be etched off to reveal the underlying conductor. These deposition and etching steps are used on a variety of conductors, semiconductors, and insulator layers. These processes are important because they provide access to some parts of the semiconductor structure while insulating other parts to control electrical behavior. In order to provide access to an underlying part of a semiconductor structure through an upper layer of the semiconductor structure, the upper layer must be etched completely through. The problem with this is that etching is a difficult process to control accurately and stop on a lower layer without etching into the lower layer. This is an especially critical problem when the underlying layer is very thin with respect to the upper layer. Moreover, the thickness of the upper layer is not generally uniform, and therefore, in order to etch completely through the thick and thin parts of the upper layer the etch process generally etches parts of the underlying layer where the upper layer is thin.
The etching of the lower layer is a problem because it can be very detrimental to the electrical operation of the semiconductor structure to etch into the lower layer. A very common example of this problem is when the emitter is formed in an NPN bipolar transistor. Typically, a bipolar transistor has a base layer covered by an insulator layer and the insulator layer has a very small opening which makes possible the formation of the emitter contact. A layer of N-type polysilicon is deposited over the opening in the insulator layer to contact the base region and form the emitter contact to the bipolar transistor. The bipolar transistor will not be operational if either the emitter contact is not made or the emitter contact is formed through the base layer and into the underlying N-type layer. The emitter may contact the N-type layer underlying the base layer if the etching process which opens the insulator layer etches through the base layer. Etching through the base layer is possible because the thickness of the base layer is very thin. The base layer thickness is typically on the order of 0.1 microns or less. The problems associated with controlling the depth of the etching process are compounded by the fact that many etching processes etch insulators at the same rate as they etch other materials. Moreover, many semiconductor processes distinguish the upper and lower layers merely by the doping type. As a result, the etching process must not only selectively etch layers but it must select differently doped layers which are the same material type. Further, the physical dimensions of the layers being etched continues to become smaller. Therefore, the etching problem continues to become more critical while the physical tools have not substantially changed.
The prior art has used a variety of techniques to solve the etching problem. One technique interposes an etch stop layer between the upper layer and the lower layer. The etch stop layer has an etch rate which is very low compared to the upper layer. The upper layer can be etched completely through while stopping on the etch stop layer and not etching the lower layer. The basic problem with this technique is that the etch stop layer must still be etched to make contact with the lower layer. The same issues of controlling the etch rate of the etch stop layer arise so that the thin lower layer is not etched wile removing the etch stop layer. Moreover, insulating etch stop layers typically prevent the formation of self-aligned transistor structures. Another common technique is the use of an etching chemical (gas or liquid) which is selective to the upper layer but does not etch, or at least etches slower, the lower layer. This is a similar idea to the etch stop layer except that the chemical is selective to the structure rather than modifying the structure to accommodate the chemical. The problem with this technique is that semiconductor devices typically have several layers which are made of the same material but just doped differently and the etch process must discriminate between doped layers. The etching chemical does not generally have a different etch rate for differently doped layers. When the etching chemical does etch doped layers differently, the difference is not large enough to control the process for very thin lower layers. Finally, the prior art has used a variety of optical endpoint detect schemes, such as interferometers, to determine the thickness of material which has been etched. The problem with this technique is that etch rates are not uniform which makes selective etching of thin layers difficult.